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HCPL-J314
0.6 Amp Output Current IGBT Gate Drive Optocoupler
Data Sheet
Lead (Pb) Free RoHS 6 fully compliant
RoHS 6 fully compliant options available; -xxxE denotes a lead-free product
Description
TheHCPL-J314familyofdevicesconsistsofanAlGaAsLED opticallycoupledtoanintegratedcircuitwithapower outputstage.Theseoptocouplersareideallysuitedfor drivingpowerIGBTsandMOSFETsusedinmotorcontrol inverterapplications.Thehighoperatingvoltagerange oftheoutputstageprovidesthedrivevoltagesrequired by gate controlled devices. The voltage and current suppliedbythisoptocouplermakesitideallysuitedfor directlydrivingsmallormediumpowerIGBTs.ForIGBTs withhigherratingstheHCPL-3150(0.6A)orHCPL-3120 (2.5A)optocouplerscanbeused.
Features
* 0.6Amaximumpeakoutputcurrent * 0.4Aminimumpeakoutputcurrent * Highspeedresponse: 0.7smax.propagationdelayovertemperature range * UltrahighCMR:min.25kV/satVCM=1.5kV * Bootstrappablesupplycurrent:max.3mA * Wideoperatingtemperaturerange:-40Cto100C * WideVCCoperatingrange:10Vto30Vovertemperaturerange * AvailableinDIP8(single)andSO16(dual)package * Safetyapprovals:ULRecognized,3750Vrmsfor1 minute.CSAApprovalIEC/EN/DINEN60747-5-2Approval.VIORM=891Vpeak
Functional Diagram
N/C ANODE CATHODE N/C
1 2 3 4
8 7 6 5
VCC VO VO VEE
Applications
* * * * * * IsolatedIGBT/PowerMOSFETgatedrive ACandbrushlessDCmotordrives Invertersforappliances Industrialinverters SwitchModePowerSupplies(SMPS) UninterruptablePowerSupplies(UPS)
SHIELD
HCPL-J314
Truth Table
LED OFF ON VO LOW HIGH
A0.1Fbypasscapacitormustbe connectedbetweenpinsVCCandVEE.
CAUTION: It is advised that normal static precautions be taken in handling and assembly of this component to prevent damage and/or degradation which may be induced by ESD.
Selection Guide Package Type 8-pinDIP(300Mil) SO16 Part Number HCPL-J314 HCPL-314J Number of Channels 1 2
Note:PleaserefertoHCPL-314Jdatasheetformoredetails
Ordering Information
HCPL-J314isULRecognizedwith3750Vrmsfor1minuteperUL1577. Option Part Number HCPL-J314 RoHS Compliant -000E -300E -500E Non RoHS Compliant No option #300 #500 Package 300mil DIP-8 Surface Mount X X Gull Wing X X X Tape & Reel IEC/EN/DIN EN 60747-5-2 X X X Quantity 50 per tube 50 per tube 1000 per reel
Toorder,chooseapartnumberfromthepartnumbercolumnandcombinewiththedesiredoptionfromtheoption columntoformanorderentry. Example 1: HCPL-J314-500E to order product of 300 mil DIP GullWing Surface Mount package inTape and Reel packagingwithIEC/EN/DINEN60747-5-2SafetyApprovalinRoHScompliant. Example2:HCPL-J314toorderproductof300milDIPpackageintubepackagingwithIEC/EN/DINEN60747-5-2Safety ApprovalandnonRoHScomplaint Optiondatasheetsareavailable.ContactyourAvagosalesrepresentativeorauthorizeddistributorforinformation. Remarks:Thenotation`#XXX'isusedforexistingproducts,while(new)productslaunchedsince15thJuly2001and RoHScompliantoptionwilluse`-XXXE`.
2
HCPL-J314 Package Outline Drawings Standard DIP Package
9.80 0.25 (0.386 0.010) 8 7 6 5 DATE CODE 7.62 0.25 (0.300 0.010) 6.35 0.25 (0.250 0.010)
HCPL-J314 YYWW 1 1.19 (0.047) MAX. 2 3 4
1.78 (0.070) MAX. + 0.076 0.254 - 0.051 + 0.003) (0.010 - 0.002)
5 TYP. 3.56 0.13 (0.140 0.005) 4.70 (0.185) MAX.
0.51 (0.020) MIN. 2.92 (0.115) MIN. DIMENSIONS IN MILLIMETERS AND (INCHES). 1.080 0.320 (0.043 0.013) 0.65 (0.025) MAX. 2.54 0.25 (0.100 0.010) NOTE: FLOATING LEAD PROTRUSION IS 0.5 mm (20 mils) MAX.
Gull Wing Surface Mount Option 300
LAND PATTERN RECOMMENDATION 9.80 0.25 (0.386 0.010)
8 7 6 5
1.02 (0.040)
HCPL-J314 YYWW
6.350 0.25 (0.250 0.010)
10.9 (0.430)
MOLDED
1
2
3
4
1.27 (0.050) 1.780 (0.070) MAX. 9.65 0.25 (0.380 0.010) 7.62 0.25 (0.300 0.010)
2.0 (0.080)
1.19 (0.047) MAX.
3.56 0.13 (0.140 0.005)
0.255 (0.075) 0.010 (0.003)
1.080 0.320 (0.043 0.013) 2.540 (0.100) BSC 0.51 0.130 (0.020 0.005)
0.635 0.25 (0.025 0.010)
12 NOM.
DIMENSIONS IN MILLIMETERS (INCHES). TOLERANCES (UNLESS OTHERWISE SPECIFIED): xx.xx = 0.01 xx.xxx = 0.005 NOTE: FLOATING LEAD PROTRUSION IS 0.5 mm (20 mils) MAX.
LEAD COPLANARITY MAXIMUM: 0.102 (0.004)
3
Solder Reflow Temperature Profile
300
PREHEATING RATE 3C + 1C/-0.5C/SEC. REFLOW HEATING RATE 2.5C 0.5C/SEC. PEAK TEMP. 245C PEAK TEMP. 240C
Regulatory Information
TheHCPL-J314hasbeenapproved bythefollowingorganizations: IEC/EN/DIN EN 60747-5-2 Approvedunder: IEC60747-5-2:1997+A1:2002 EN60747-5-2:2001+A1:2002 DINEN60747-5-2(VDE0884 Teil2):2003-01 UL ApprovalunderUL1577,componentrecognitionprogramupto VISO=3750Vrms.FileE55361. CSA ApprovedunderCSAComponent AcceptanceNotice#5,FileCA 88324.
TEMPERATURE (C)
200
160C 150C 140C
PEAK TEMP. 230C
2.5C 0.5C/SEC. 30 SEC. 3C + 1C/-0.5C 30 SEC.
SOLDERING TIME 200C

100
PREHEATING TIME 150C, 90 + 30 SEC. 50 SEC. TIGHT TYPICAL LOOSE
ROOM TEMPERATURE
0
0
50
100
150
200
250
TIME (SECONDS)
Note: Non-halide flux should be used.
Recommended Pb-Free IR Profile
TIME WITHIN 5 C of ACTUAL PEAK TEMPERATURE 20-40 SEC.
tp Tp TL
TEMPERATURE
260 +0/-5 C 217 C RAMP-UP 3 C/SEC. MAX. 150 - 200 C
Tsmax Tsmin
RAMP-DOWN 6 C/SEC. MAX.
ts PREHEAT 60 to 180 SEC. 25
tL
60 to 150 SEC.
t 25 C to PEAK
TIME NOTES: THE TIME FROM 25 C to PEAK TEMPERATURE = 8 MINUTES MAX. Tsmax = 200 C, Tsmin = 150 C
Note: Non-halide flux should be used.
4
IEC/EN/DIN EN 60747-5-2 Insulation Characteristics Description InstallationclassificationperDINVDE0110/1.89,Table1 forratedmainsvoltage150Vrms forratedmainsvoltage300Vrms forratedmainsvoltage600Vrms ClimaticClassification PollutionDegree(DINVDE0110/1.89) MaximumWorkingInsulationVoltage InputtoOutputTestVoltage,Methodb* VIORMx1.875=VPR,100%ProductionTestwithtm=1sec, Partialdischarge<5pC InputtoOutputTestVoltage,Methoda* VIORMx1.5=VPR,TypeandSampleTest,tm=60sec, Partialdischarge<5pC HighestAllowableOvervoltage(TransientOvervoltagetini=10sec) Symbol VIORM VPR VPR VIOTM Characteristic I-IV I-IV I-III 55/100/21 2 891 1670 1336 6000 175 400 1200 >109 Vpeak Vpeak Vpeak Vpeak C mA mW Unit
Safety-limitingvalues-maximumvaluesallowedintheeventofafailure. CaseTemperature TS InputCurrent** IS,INPUT OutputPower** PS,OUTPUT InsulationResistanceatTS,VIO=500V RS
*RefertotheoptocouplersectionoftheIsolationandControlComponentsDesigner'sCatalog,underProductSafetyRegulationssection,IEC/ EN/DINEN60747-5-2foradetaileddescriptionofMethodaandMethodbpartialdischargetestprofiles. **RefertothefollowingfigurefordependenceofPSandISonambienttemperature.
OUTPUT POWER - PS, INPUT CURRENT - IS
800 700 600 500 400 300 200 100 0 0 25 50 75 100 125 150 175 200 PS (mW) IS (mA)
TS - CASE TEMPERATURE - C
HCPL-J314
5
Insulation and Safety Related Specifications
Parameter MinimumExternalAirGap (Clearance) MinimumExternalTracking (Creepage) MinimumInternalPlasticGap (InternalClearance) TrackingResistance (ComparativeTrackingIndex) IsolationGroup Symbol L(101) L(102) CTI HCPL-J314 7.4 8.0 0.5 >175 IIIa Units mm mm mm V Conditions Measuredfrominputterminalstooutput terminals,shortestdistancethroughair. Measuredfrominputterminalstooutput terminals,shortestdistancepathalongbody. Throughinsulationdistanceconductorto conductor,usuallythestraightlinedistance thicknessbetweentheemitteranddetector. DINIEC112/VDE0303Part1 MaterialGroup(DINVDE0110,1/89,Table1)
Absolute Maximum Ratings Parameter StorageTemperature OperatingTemperature AverageInputCurrent PeakTransientInputCurrent (<1spulsewidth,300pps) ReverseInputVoltage "High"PeakOutputCurrent "Low"PeakOutputCurrent SupplyVoltage OutputVoltage OutputPowerDissipation InputPowerDissipation LeadSolderTemperature SolderReflowTemperatureProfile Symbol TS TA IF(AVG) IF(TRAN) VR IOH(PEAK) IOL(PEAK) VCC-VEE VO(PEAK) PO PI Min. -55 -40 -0.5 -0.5 Max. 125 100 25 1.0 5 0.6 0.6 35 VCC 260 105 Units C C mA A V A A V V mW mW 3 4 2 2 1 Note
260Cfor10sec.,1.6mmbelowseatingplane SeePackageOutlineDrawingssection
6
Recommended Operating Conditions Parameter PowerSupply InputCurrent(ON) InputVoltage(OFF) OperatingTemperature Symbol VCC-VEE IF(ON) VF(OFF) TA Min. 10 8 -3.6 -40 Max. 30 12 0.8 100 Units V mA V C Note
Electrical Specifications (DC) Overrecommendedoperatingconditionsunlessotherwisespecified. Parameter HighLevelOutputCurrent LowLevelOutputCurrent HighLevelOutputVoltage LowLevelOutputVoltage HighLevelSupplyCurrent LowLevelSupplyCurrent Symbol IOH IOL VOH VOL ICCH ICCL Min. 0.2 0.4 0.2 0.4 VCC-4 0.8 1.2 5 0.5 0.4 0.5 VCC-1.8 0.4 0.7 1.2 1.5 -1.6 60 Typ. Max. 1 3 3 6 1.8 Units A A V V mA mA mA V V mV/C V pF IR=10A f=1MHz, VF=0V Test Conditions VO=VCC-4 VO=VCC-10 VO=VEE+2.5 VO=VEE+10 IO=-100mA IO=100mA IO=0mA IO=0mA IO=0mA, VO>5V IF=10mA Fig. 2 3 5 6 1 4 7,8 9,15 16 14 Note 5 2 5 2 6,7
ThresholdInputCurrentLowtoHigh IFLH ThresholdInputVoltageLowtoHigh VFHL InputForwardVoltage TemperatureCoefficientofInput ForwardVoltage InputReverseBreakdownVoltage InputCapacitance VF DVF/DTA BVR CIN
7
Switching Specifications (AC) Overrecommendedoperatingconditionsunlessotherwisespecified. Parameter Symbol Min. 0.1 0.1 -0.5 25 25 Typ. 0.2 0.3 50 50 35 35 Max. 0.7 0.7 0.5 Units s s s ns ns kV/s kV/s Test Conditions Fig. Note
PropagationDelayTimetoHighOutputtPLH Level PropagationDelayTimetoLowOutputtPHL Level PropagationDelayDifference BetweenAnyTwoPartsorChannels RiseTime FallTime OutputHighLevelCommonMode TransientImmunity OutputLowLevelCommonMode TransientImmunity PDD tR tF |CMH| |CML|
Rg=47,Cg=3nF, 10,11, 14 f=10kHz, 12,13, DutyCycle=50%, 14,17 f=10kHz,IF=8mA, VCC=30V 10 TA=25C, VCM=1.5kV 18 18 11 12
Package Characteristics For each channel unless otherwise specified. Parameter Input-OutputMomentaryWithstand Voltage Symbol VISO Min. Typ. Max. Units Vrms Vrms pF Test Conditions TA=25C, RH<50%for1min. VI-O=500V Freq=1MHz Fig. Note 8,9 15 9
3750 1500 1012 1.2
Output-OutputMomentaryWithstand VO-O Voltage Input-OutputResistance Input-OutputCapacitance RI-O CI-O
Notes: 1. Deratelinearlyabove70Cfreeairtemperatureatarateof0.3mA/C. 2. Maximumpulsewidth=10s,maximumdutycycle=0.2%.ThisvalueisintendedtoallowforcomponenttolerancesfordesignswithIOpeak minimum=0.4A.SeeApplicationsectionforadditionaldetailsonlimitingIOLpeak. 3. Deratelinearlyabove85C,freeairtemperatureattherateof4.0mW/C. 4. Inputpowerdissipationdoesnotrequirederating. 5. Maximumpulsewidth=50s,maximumdutycycle=0.5%. 6. Inthistest,VOHismeasuredwithaDCloadcurrent.WhendrivingcapacitiveloadVOHwillapproachVCCasIOHapproacheszeroamps. 7. Maximumpulsewidth=1ms,maximumdutycycle=20%. 8. InaccordancewithUL1577,eachHCPL-J314optocouplerisprooftestedbyapplyinganinsulationtestvoltage5000Vrmsfor1second(leakage detectioncurrentlimitII-O5A).Thistestisperformedbefore100%productiontestforpartialdischarge(methodB)shownintheIEC/EN/DIN EN60747-5-2InsulationCharacteristicsTable,ifapplicable. 9. Deviceconsideredatwo-terminaldevice:pinsoninputsideshortedtogetherandpinsonoutputsideshortedtogether. 10.PDDisthedifferencebetweentPHLandtPLHbetweenanytwopartsorchannelsunderthesametestconditions. 11.Commonmodetransientimmunityinthehighstateisthemaximumtolerable|dVcm/dt|ofthecommonmodepulseVCMtoassurethatthe outputwillremaininthehighstate(i.e.Vo>6.0V). 12.Commonmodetransientimmunityinalowstateisthemaximumtolerable|dVCM/dt|ofthecommonmodepulse,VCM,toassurethattheoutput willremaininalowstate(i.e.Vo<1.0V). 13.Thisloadconditionapproximatesthegateloadofa1200V/25AIGBT. 14.Foreachchannel.ThepowersupplycurrentincreaseswhenoperatingfrequencyandQgofthedrivenIGBTincreases. 15.Deviceconsideredatwoterminaldevice:Channeloneoutputsidepinsshortedtogether,andchanneltwooutputsidepinsshortedtogether.
8
(VOH-VCC) - HIGH OUTPUT VOLTAGE DROP - V
0
IOH - OUTPUT HIGH CURRENT - A
0.40 0.38 0.36 0.34 0.32 0.30 -50
(VOH-VCC) - OUTPUT HIGH VOLTAGE DROP - V
0 -1 -2 -3 -4 -5 -6 VOH
-0.5 -1.0 -1.5 -2.0 -2.5 -50
-25
0
25
50
75
100 125
-25
0
25
50
75
100 125
0
0.2
0.4
0.6
TA - TEMPERATURE - C
TA - TEMPERATURE - C
IOH - OUTPUT HIGH CURRENT - A
Figure 1. VOH vs. temperature.
HCPL-J314 fig 01
Figure 2. IOH vs. temperature.
HCPL-J314 fig 02
Figure 3. VOH vs. IOH.
HCPL-J314 fig 03
0.44
VOL - OUTPUT LOW VOLTAGE - V IOL - OUTPUT LOW CURRENT - A
0.470 0.465 0.460 0.455 0.450 0.445 0.440 -50
25
VOL - OUTPUT LOW VOLTAGE - V
-25 0 25 50 75 100 125
0.43 0.42 0.41 0.40 0.39 -50
20 15 10 5 0
-25
0
25
50
75
100 125
TA - TEMPERATURE - C
TA - TEMPERATURE - C
0
100 200 300 400 500 600 700 IOL - OUTPUT LOW CURRENT - mA
Figure 4. VOL vs. temperature.
HCPL-J314 fig 04
Figure 5. IOL vs. temperature.
HCPL-J314 fig 05
Figure 6. VOL vs. IOL.
1.4
ICC - SUPPLY CURRENT - mA
IFLH - LOW TO HIGH CURRENT THRESHOLD - mA
1.2
ICC - SUPPLY CURRENT - mA
3.5
1.2 1.0 0.8 0.6 0.4 0.2 0 -50 -25 0 25 50 75 ICCL ICCH 100 125
1.0 0.8 0.6 0.4 0.2 0 10 ICCL ICCH 15 20 25 30
3.0
2.5
2.0
1.5 -50
-25
0
25
50
75
100 125
TA - TEMPERATURE - C
VCC - SUPPLY VOLTAGE - V
TA - TEMPERATURE - C
Figure 7. ICC vs. temperature.
HCPL-J314 fig 07
Figure 8. ICC vs. VCC.
HCPL-J314 fig 08
Figure 9. IFLH vs. temperature.
HCPL-J314 fig 09
9
400
TP - PROPAGATION DELAY - ns TP - PROPAGATION DELAY - ns
400 TP - PROPAGATION DELAY - ns
500 400 300 200 100 0 -50
300
300
200
200
100 TPLH TPHL 15 20 25 30
100
TPLH TPHL -25 0 25 50 75 100 125
0 10
0
6
9
12
15
18
VCC - SUPPLY VOLTAGE - V
IF - FORWARD LED CURRENT - mA
TA - TEMPERATURE - C
Figure 10. Propagation delay vs. VCC.
HCPL-J314 fig 10
Figure 11. Propagation delay vs. IF.
HCPL-J314 fig 11
Figure 12. Propagation delay vs. temperature.
HCPL-J314 fig 12
400
TP - PROPAGATION DELAY - ns TP - PROPAGATION DELAY - ns
400
VO - OUTPUT VOLTAGE - V
35 30 25 20 15 10 5 0 -5 0 1 2 3 4 5 6
350
300
300
TPLH TPHL
200
250
100 TPLH 0 TPHL 0 20 40 60 80 100
200
0
50
100
150
200
Rg - SERIES LOAD RESISTANCE -
Cg - LOAD CAPACITANCE - nF
IF - FORWARD LED CURRENT - mA
Figure 13. Propagation delay vs. Rg.
HCPL-J314 fig 13
Figure 14. Propagation delay vs. Cg.
HCPL-J314 fig 14
Figure 15. Transfer characteristics.
25
IF - FORWARD CURRENT - mA
20 15 10 5 0 1.2
1.4
1.6
1.8
VF - FORWARD VOLTAGE - V
Figure 16. Input current vs. forward voltage.
HCPL-J314 fig 16
10
1 IF = 7 to 16 mA + 10 KHz - 500 2
8 0.1 F 7 VO + - VCC = 15 to 30 V IF tr tf 90% 50% VOUT tPLH tPHL 10%
50% DUTY CYCLE
3
6
47 3 nF
4
5
Figure 17. Propagation delay test circuit and waveforms.
VCM IF 1 A B 2 7 VO 3 6 + - VCC = 30 V VO SWITCH AT A: IF = 10 mA VO SWITCH AT B: IF = 0 mA + VCM = 1500 V - VOL 8 0.1 F 0V t VOH V t = VCM t
5V
+ -
4
5
Figure 18. CMR test circuit and waveforms.
11
Applications Information Eliminating Negative IGBT Gate Drive
TokeeptheIGBTfirmlyoff,theHCPL-J314hasaverylow maximumVOLspecificationof1.0V.MinimizingRgand theleadinductancefromtheHCPL-J314totheIGBTgate andemitter(possiblybymountingtheHCPL-J314ona smallPCboarddirectlyabovetheIGBT)caneliminatethe needfornegativeIGBTgatedriveinmanyapplications asshowninFigure19.Careshouldbetakenwithsucha PCboarddesigntoavoidroutingtheIGBTcollectoror emittertracesclosetotheHCPL-J314inputasthiscan resultinunwantedcouplingoftransientsignalsintothe input of HCPL-J314 and degrade performance. (If the IGBT drain must be routed near the HCPL-J314 input, thentheLEDshouldbereversebiasedwhenintheoff state,topreventthetransientsignalscoupledfromthe IGBTdrainfromturningontheHCPL-J314.)
+5 V 270
HCPL-J314 1 8 0.1 F 2 7 + VCC = 15 V Rg Q1
+ HVDC
CONTROL INPUT 74XXX OPEN COLLECTOR
3
6
3-PHASE AC
4
5 Q2
- HVDC
Figure 19. Recommended LED drive and application circuit for HCPL-J314.
12
Esw - ENERGY PER SWITCHING CYCLE - J
Selecting the Gate Resistor (Rg)
Step 1:CalculateRgminimumfromtheIOLpeakspecification.TheIGBTandRginFigure19canbeanalyzedas asimpleRCcircuitwithavoltagesuppliedbytheHCPLJ314. VCC - VOL Rg -------- IOLPEAK 24V-5V = -------- 0.6A = 32
4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0 0 20 40 60 80 100 Qg = 50 nC Qg = 100 nC Qg = 200 nC Qg = 400 nC
Rg - GATE RESISTANCE -
TheVOLvalueof5VinthepreviousequationistheVOL atthepeakcurrentof0.6A.(SeeFigure6). Step 2:ChecktheHCPL-J314powerdissipationandincreaseRgifnecessary.TheHCPL-J314totalpowerdissipation(PT )isequaltothesumoftheemitterpower(PE) andtheoutputpower(PO). PT=PE+PO PE = IF 6 VF 6 Duty Cycle PO = PO(BIAS) + PO(SWITCHING) = ICC 6 VCC + ESW (Rg,Qg) 6 f =(ICCBIAS+KICC 6 Qg 6 f) 6 VCC+ESW(Rg,Qg) 6 f whereKICC 6 Qg 6 fistheincreaseinICCduetoswitchingandKICC isaconstantof0.001mA/(nC*kHz).Forthe circuitinFigure19withIF(worstcase)=10mA,Rg=32 ,MaxDutyCycle=80%,Qg=100nC,f=20kHzand TAMAX=85C: PE =10mA 6 1.8V6 0.8=14mW PO=(3mA+(0.001mA/(nC 6 kHz))6 20kHz6 100nC)6 24V+0.4J6 20kHz=80mW <260mW (PO(MAX)@85C)
Figure 20. Energy dissipated in the HCPL-J314 and for each IGBT switching cycle.
LED Drive Circuit Considerations for Ultra High CMR Performance
Without a detector shield, the dominant cause of optocoupler CMR failure is capacitive coupling from the inputsideoftheoptocoupler,throughthepackage,to the detector IC as shown in Figure 21. The HCPL-J314 improvesCMRperformancebyusingadetectorICwith anopticallytransparentFaradayshield,whichdivertsthe capacitivelycoupledcurrentawayfromthesensitiveIC circuitry.However,thisshielddoesnoteliminatethecapacitivecouplingbetweentheLEDandoptocouplerpins 5-8asshowninFigure22.Thiscapacitivecouplingcauses perturbationsintheLEDcurrentduringcommonmode transientsandbecomesthemajorsourceofCMRfailures forashieldedoptocoupler.Themaindesignobjectiveof ahighCMRLEDdrivecircuitbecomeskeepingtheLEDin theproperstate(onoroff )duringcommonmodetransients.Forexample,therecommendedapplicationcircuit (Figure19),canachieve10kV/sCMRwhileminimizing componentcomplexity. Techniques to keep the LED in the proper state are discussedinthenexttwosections.
Thevalueof3mAforICCinthepreviousequationisthe max.ICCoverentireoperatingtemperaturerange. SincePOforthiscaseislessthanPO(MAX),Rg=32isall rightforthepowerdissipation.
13
1
CLEDP
8
1
CLEDP
8
2
7
2
7
3
CLEDN
6
3
CLEDN
6
4
5
4
5
Figure 21. Optocoupler input to output capacitance model for unshielded optocouplers.
Figure 22. Optocoupler input to output capacitance model for shielded optocouplers.
HCPL-J314 fig 22
+5 V 1
CLEDP ILEDP
8 0.1 F + VCC = 18 V
+ VSAT -
2
7
3
CLEDN
6
Rg
***
4
SHIELD
5
***
* THE ARROWS INDICATE THE DIRECTION OF CURRENT FLOW DURING dVCM/dt.
+VCM
Figure 23. Equivalent circuit for Figure 17 during common mode transient.
1 +5 V 2
CLEDP
8
1 +5 V
CLEDP
8
7
2
7
Q1
3
CLEDN ILEDN
6
3
CLEDN
6
4
SHIELD
5
4
SHIELD
5
Figure 24. Not recommended open collector drive circuit.
Figure 25. Recommended LED drive circuit for ultra-high CMR IPM dead time and propagation delay specifications.
14
CMR with the LED On (CMRH)
A high CMR LED drive circuit must keep the LED on during common mode transients. This is achieved by overdrivingtheLEDcurrentbeyondtheinputthreshold so that it is not pulled below the threshold during a transient. A minimum LED current of 8 mA provides adequatemarginoverthemaximumIFigure26.Minimum LEDSkewforZeroDeadTime.Figure27.Waveformsfor DeadTime.of5mAtoachieve10kV/sCMR.
IPM Dead Time and Propagation Delay Specifications
The HCPL-J314 includes a Propagation Delay Difference (PDD) specification intended to help designers minimize "dead time" in their power inverter designs. Dead time is the time high and low side power transistors are off. Any overlap in Ql and Q2 conduction will result in large currents flowing through the power devices from the highvoltagetothelow-voltagemotorrails.Tominimizedead time in a given design, the turn on of LED2 should be delayed(relativetotheturnoffofLED1)sothatunder worst-caseconditions,transistorQ1hasjustturnedoff whentransistorQ2turnson,asshowninFigure26.The amount of delay necessary to achieve this condition is equaltothemaximumvalueofthepropagationdelay difference specification, PDD max, which is specified to be 500 ns over the operating temperature range of -40to100C. Delaying the LED signal by the maximum propagation delay difference ensures that the minimum dead time is zero, but it does not tell a designer what the maximum dead time will be. The maximum dead time is equivalent to the difference between the maximum and minimum propagation delay difference specification as shown in Figure 27. The maximum dead time for the HCPL-J314 is 1 s (= 0.5 s - (-0.5 s)) over the operating temperature range of -40Cto100C. NotethatthepropagationdelaysusedtocalculatePDD anddeadtimearetakenatequaltemperaturesandtest conditionssincetheoptocouplersunderconsideration are typically mounted in close proximity to each other andareswitchingidenticalIGBTs.
CMR with the LED Off (CMRL)
AhighCMRLEDdrivecircuitmustkeeptheLEDoff(VF VF(OFF))duringcommonmodetransients.Forexample, during a -dVCM/dt transient in Figure 23, the current flowingthroughCLEDPalsoflowsthroughtheRSATand VSATofthelogicgate.Aslongasthelowstatevoltage developedacrossthelogicgateislessthanVF(OFF)the LED will remain off and no common mode failure will occur. Theopencollectordrivecircuit,showninFigure24,can notkeeptheLEDoffduringa+dVCM/dttransient,since allthecurrentflowingthroughCLEDNmustbesupplied bytheLED,anditisnotrecommendedforapplications requiringultrahighCMR1performance.Thealternative drive circuit which like the recommended application circuit(Figure19),doesachieveultrahighCMRperformancebyshuntingtheLEDintheoffstate.
ILED1 VOUT1
Q1 ON Q1 OFF Q2 ON
VOUT2 ILED2
Q2 OFF
tPHL MAX tPLH MIN PDD* MAX = (tPHL- tPLH)MAX = tPHL MAX - tPLH MIN
*PDD = PROPAGATION DELAY DIFFERENCE NOTE: FOR PDD CALCULATIONS THE PROPAGATION DELAYS ARE TAKEN AT THE SAME TEMPERATURE AND TEST CONDITIONS.
Figure 26. Minimum LED skew for zero dead time.
HCPL-J314 fig 27
ILED1 VOUT1
Q1 ON Q1 OFF Q2 ON
VOUT2 ILED2
Q2 OFF
tPHL MIN tPHL MAX tPLH
MIN
tPLH MAX (tPHL-tPLH) MAX PDD* MAX MAXIMUM DEAD TIME (DUE TO OPTOCOUPLER) = (tPHL MAX - tPHL MIN) + (tPLH MAX - tPLH MIN) = (tPHL MAX - tPLH MIN) - (tPHL MIN - tPLH MAX) = PDD* MAX - PDD* MIN *PDD = PROPAGATION DELAY DIFFERENCE NOTE: FOR DEAD TIME AND PDD CALCULATIONS ALL PROPAGATION DELAYS ARE TAKEN AT THE SAME TEMPERATURE AND TEST CONDITIONS.
HCPL-J314 fig 28 Figure 27. Waveforms for dead time.
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